'\" t .\" Title: perf-mem .\" Author: [FIXME: author] [see http://www.docbook.org/tdg5/en/html/author] .\" Generator: DocBook XSL Stylesheets vsnapshot .\" Date: 09/04/2026 .\" Manual: perf Manual .\" Source: perf .\" Language: English .\" .TH "PERF\-MEM" "1" "09/04/2026" "perf" "perf Manual" .\" ----------------------------------------------------------------- .\" * Define some portability stuff .\" ----------------------------------------------------------------- .\" ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ .\" http://bugs.debian.org/507673 .\" http://lists.gnu.org/archive/html/groff/2009-02/msg00013.html .\" ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ .ie \n(.g .ds Aq \(aq .el .ds Aq ' .\" ----------------------------------------------------------------- .\" * set default formatting .\" ----------------------------------------------------------------- .\" disable hyphenation .nh .\" disable justification (adjust text to left margin only) .ad l .\" ----------------------------------------------------------------- .\" * MAIN CONTENT STARTS HERE * .\" ----------------------------------------------------------------- .SH "NAME" perf-mem \- Profile memory accesses .SH "SYNOPSIS" .sp .nf \fIperf mem\fR [] (record [] | report) .fi .SH "DESCRIPTION" .sp "perf mem record" runs a command and gathers memory operation data from it, into perf\&.data\&. Perf record options are accepted and are passed through\&. .sp "perf mem report" displays the result\&. It invokes perf report with the right set of options to display a memory access profile\&. By default, loads and stores are sampled\&. Use the \-t option to limit to loads or stores\&. .sp Note that on Intel systems the memory latency reported is the use\-latency, not the pure load (or store latency)\&. Use latency includes any pipeline queuing delays in addition to the memory subsystem latency\&. .sp On Arm64 this uses SPE to sample load and store operations, therefore hardware and kernel support is required\&. See \fBperf-arm-spe\fR(1) for a setup guide\&. Due to the statistical nature of SPE sampling, not every memory operation will be sampled\&. .sp On AMD this use IBS Op PMU to sample load\-store operations\&. .SH "COMMON OPTIONS" .PP \-f, \-\-force .RS 4 Don\(cqt do ownership validation .RE .PP \-t, \-\-type= .RS 4 Select the memory operation type: load or store (default: load,store) .RE .PP \-v, \-\-verbose .RS 4 Be more verbose (show counter open errors, etc) .RE .PP \-p, \-\-phys\-data .RS 4 Record/Report sample physical addresses .RE .PP \-\-data\-page\-size .RS 4 Record/Report sample data address page size .RE .SH "RECORD OPTIONS" .PP \&... .RS 4 Any command you can specify in a shell\&. .RE .PP \-e, \-\-event .RS 4 Event selector\&. Use \fIperf mem record \-e list\fR to list available events\&. .RE .PP \-K, \-\-all\-kernel .RS 4 Configure all used events to run in kernel space\&. .RE .PP \-U, \-\-all\-user .RS 4 Configure all used events to run in user space\&. .RE .PP \-\-ldlat .RS 4 Specify desired latency for loads event\&. Supported on Intel, Arm64 and some AMD processors\&. Ignored on other archs\&. .sp .if n \{\ .RS 4 .\} .nf On supported AMD processors: \- /sys/bus/event_source/devices/ibs_op/caps/ldlat file contains \*(Aq1\*(Aq\&. \- Supported latency values are 128 to 2048 (both inclusive)\&. \- Latency value which is a multiple of 128 incurs a little less profiling overhead compared to other values\&. \- Load latency filtering is disabled by default\&. .fi .if n \{\ .RE .\} .RE .SH "REPORT OPTIONS" .PP \-i, \-\-input= .RS 4 Input file name\&. .RE .PP \-C, \-\-cpu= .RS 4 Monitor only on the list of CPUs provided\&. Multiple CPUs can be provided as a comma\-separated list with no space: 0,1\&. Ranges of CPUs are specified with \- like 0\-2\&. Default is to monitor all CPUS\&. .RE .PP \-D, \-\-dump\-raw\-samples .RS 4 Dump the raw decoded samples on the screen in a format that is easy to parse with one sample per line\&. .RE .PP \-s, \-\-sort= .RS 4 Group result by given key(s) \- multiple keys can be specified in CSV format\&. The keys are specific to memory samples are: symbol_daddr, symbol_iaddr, dso_daddr, locked, tlb, mem, snoop, dcacheline, phys_daddr, data_page_size, blocked\&. .sp .RS 4 .ie n \{\ \h'-04'\(bu\h'+03'\c .\} .el \{\ .sp -1 .IP \(bu 2.3 .\} symbol_daddr: name of data symbol being executed on at the time of sample .RE .sp .RS 4 .ie n \{\ \h'-04'\(bu\h'+03'\c .\} .el \{\ .sp -1 .IP \(bu 2.3 .\} symbol_iaddr: name of code symbol being executed on at the time of sample .RE .sp .RS 4 .ie n \{\ \h'-04'\(bu\h'+03'\c .\} .el \{\ .sp -1 .IP \(bu 2.3 .\} dso_daddr: name of library or module containing the data being executed on at the time of the sample .RE .sp .RS 4 .ie n \{\ \h'-04'\(bu\h'+03'\c .\} .el \{\ .sp -1 .IP \(bu 2.3 .\} locked: whether the bus was locked at the time of the sample .RE .sp .RS 4 .ie n \{\ \h'-04'\(bu\h'+03'\c .\} .el \{\ .sp -1 .IP \(bu 2.3 .\} tlb: type of tlb access for the data at the time of the sample .RE .sp .RS 4 .ie n \{\ \h'-04'\(bu\h'+03'\c .\} .el \{\ .sp -1 .IP \(bu 2.3 .\} mem: type of memory access for the data at the time of the sample .RE .sp .RS 4 .ie n \{\ \h'-04'\(bu\h'+03'\c .\} .el \{\ .sp -1 .IP \(bu 2.3 .\} snoop: type of snoop (if any) for the data at the time of the sample .RE .sp .RS 4 .ie n \{\ \h'-04'\(bu\h'+03'\c .\} .el \{\ .sp -1 .IP \(bu 2.3 .\} dcacheline: the cacheline the data address is on at the time of the sample .RE .sp .RS 4 .ie n \{\ \h'-04'\(bu\h'+03'\c .\} .el \{\ .sp -1 .IP \(bu 2.3 .\} phys_daddr: physical address of data being executed on at the time of sample .RE .sp .RS 4 .ie n \{\ \h'-04'\(bu\h'+03'\c .\} .el \{\ .sp -1 .IP \(bu 2.3 .\} data_page_size: the data page size of data being executed on at the time of sample .RE .sp .RS 4 .ie n \{\ \h'-04'\(bu\h'+03'\c .\} .el \{\ .sp -1 .IP \(bu 2.3 .\} blocked: reason of blocked load access for the data at the time of the sample .sp .if n \{\ .RS 4 .\} .nf And the default sort keys are changed to local_weight, mem, sym, dso, symbol_daddr, dso_daddr, snoop, tlb, locked, blocked, local_ins_lat\&. .fi .if n \{\ .RE .\} .RE .RE .PP \-F, \-\-fields= .RS 4 Specify output field \- multiple keys can be specified in CSV format\&. Please see \fBperf-report\fR(1) for details\&. .sp .if n \{\ .RS 4 .\} .nf In addition to the default fields, \*(Aqperf mem report\*(Aq will provide the following fields to break down sample periods\&. .fi .if n \{\ .RE .\} .sp .RS 4 .ie n \{\ \h'-04'\(bu\h'+03'\c .\} .el \{\ .sp -1 .IP \(bu 2.3 .\} op: operation in the sample instruction (load, store, prefetch, \&...) .RE .sp .RS 4 .ie n \{\ \h'-04'\(bu\h'+03'\c .\} .el \{\ .sp -1 .IP \(bu 2.3 .\} cache: location in CPU cache (L1, L2, \&...) where the sample hit .RE .sp .RS 4 .ie n \{\ \h'-04'\(bu\h'+03'\c .\} .el \{\ .sp -1 .IP \(bu 2.3 .\} mem: location in memory or other places the sample hit .RE .sp .RS 4 .ie n \{\ \h'-04'\(bu\h'+03'\c .\} .el \{\ .sp -1 .IP \(bu 2.3 .\} dtlb: location in Data TLB (L1, L2) where the sample hit .RE .sp .RS 4 .ie n \{\ \h'-04'\(bu\h'+03'\c .\} .el \{\ .sp -1 .IP \(bu 2.3 .\} snoop: snoop result for the sampled data access .sp .if n \{\ .RS 4 .\} .nf Please take a look at the OUTPUT FIELD SELECTION section for caveats\&. .fi .if n \{\ .RE .\} .RE .RE .PP \-T, \-\-type\-profile .RS 4 Show data\-type profile result instead of code symbols\&. This requires the debug information and it will change the default sort keys to: mem, snoop, tlb, type\&. .RE .PP \-U, \-\-hide\-unresolved .RS 4 Only display entries resolved to a symbol\&. .RE .PP \-x, \-\-field\-separator= .RS 4 Specify the field separator used when dump raw samples (\-D option)\&. By default, The separator is the space character\&. .RE .sp In addition, for report all perf report options are valid, and for record all perf record options\&. .SH "OVERHEAD CALCULATION" .sp Unlike \fBperf-report\fR(1), which calculates overhead from the actual sample period, perf\-mem overhead is calculated using sample weight\&. E\&.g\&. there are two samples in perf\&.data file, both with the same sample period, but one sample with weight 180 and the other with weight 20: .sp .if n \{\ .RS 4 .\} .nf $ perf script \-F period,data_src,weight,ip,sym 100000 629080842 |OP LOAD|LVL L3 hit|\&.\&.\&. 20 7e69b93ca524 strcmp 100000 1a29081042 |OP LOAD|LVL RAM hit|\&.\&.\&. 180 ffffffff82429168 memcpy .fi .if n \{\ .RE .\} .sp .if n \{\ .RS 4 .\} .nf $ perf report \-F overhead,symbol 50% [\&.] strcmp 50% [k] memcpy .fi .if n \{\ .RE .\} .sp .if n \{\ .RS 4 .\} .nf $ perf mem report \-F overhead,symbol 90% [k] memcpy 10% [\&.] strcmp .fi .if n \{\ .RE .\} .SH "OUTPUT FIELD SELECTION" .sp "perf mem report" adds a number of new output fields specific to data source information in the sample\&. Some of them have the same name with the existing sort keys ("mem" and "snoop")\&. So unlike other fields and sort keys, they\(cqll behave differently when it\(cqs used by \-F/\-\-fields or \-s/\-\-sort\&. .sp Using those two as output fields will aggregate samples altogether and show breakdown\&. .sp .if n \{\ .RS 4 .\} .nf $ perf mem report \-F mem,snoop \&.\&.\&. # \-\-\-\-\-\- Memory \-\-\-\-\-\-\- \-\-\- Snoop \-\-\-\- # RAM Uncach Other HitM Other # \&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&. \&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&. # 3\&.5% 0\&.0% 96\&.5% 25\&.1% 74\&.9% .fi .if n \{\ .RE .\} .sp But using the same name for sort keys will aggregate samples for each type separately\&. .sp .if n \{\ .RS 4 .\} .nf $ perf mem report \-s mem,snoop # Overhead Samples Memory access Snoop # \&.\&.\&.\&.\&.\&.\&.\&. \&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&. \&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&. \&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&.\&. # 47\&.99% 1509 L2 hit N/A 25\&.08% 338 core, same node Any cache hit HitM 10\&.24% 54374 N/A N/A 6\&.77% 35938 L1 hit N/A 6\&.39% 101 core, same node Any cache hit N/A 3\&.50% 69 RAM hit N/A 0\&.03% 158 LFB/MAB hit N/A 0\&.00% 2 Uncached hit N/A .fi .if n \{\ .RE .\} .SH "SEE ALSO" .sp \fBperf-record\fR(1), \fBperf-report\fR(1), \fBperf-arm-spe\fR(1)